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Formal Verification of a Processor with Memory Management Units

Name: Formal Verification of a Processor with Memory Management Units
Brand: VDM Verlag Dr. Müller
SKU: 06810366
Price: 49.9 EUR
Availability: InStock
Author: Iakov Dalinger
ISBN: 9783639001884

Hardware Design without Logical Bugs

Iakov Dalinger

Jazyk

Angličtina

Kniha Brožovaná

Libristo kód: 06810366

Nakladateľstvo VDM Verlag Dr. Müller, november 2007

In this book we present the formal verification of a memory management unit which operates under spe... Celý popis

Libristo kód: 06810366

120 b

49.90 €

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In this book we present the formal verification of a memory management unit which operates under specific conditions. We also present the formal verification of a complex processor VAMP with support of address translation by means of a memory management unit. The VAMP is an out-of-order 32-bit RISC CPU with a DLX instruction set, fully IEEE-compliant floating point units, and a memory unit. The VAMP also supports precise internal and external interrupts. It is modeled on the gate level and verified with respect to its specification. The subject of this book is based on the formal proof of the VAMP without address translation [Bey05] and on paper and pencil specification, implementation, and correctness proof of a memory management unit [Hil05]. The results of this work yield a formally verified gate-level implementation of the VAMP with support of address translation, with interrupts, and a cache memory interface with split instruction and data caches.