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Development of Efficient Hardware Architecture for Image Compression

Name: Development of Efficient Hardware Architecture for Image Compression
Brand: LAP Lambert Academic Publishing
SKU: 18795645
Price: 66.65 EUR
Availability: InStock
Author: Khamees Khalaf Hasan Al-jumaily
ISBN: 9786202197526

The Mapping of the Computational Tasks Associated with the Discrete Wavelet Transform DWT

Khamees Khalaf Hasan Al-jumaily

Jazyk

Angličtina

Kniha Brožovaná

Libristo kód: 18795645

Nakladateľstvo LAP Lambert Academic Publishing, november 2016

Focusing on the intensive computations involved in the discrete wavelet transform (DWT), the design... Celý popis

Libristo kód: 18795645

161 b

66.65 €

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Focusing on the intensive computations involved in the discrete wavelet transform (DWT), the design of efficient hardware architectures for a fast computation of the transform has become imperative, especially for real-time applications. With this overall objective, the mapping of the computational tasks associated with the various resolution levels of the 5/3 DWT is first mathematically modeled, and then a modified computation of the DWT stages are explored from the standpoint of evading computing high frequency subbands. Furthermore, a Haar wavelet transform (HWT) is used for comparison. The proposed forward DWT (FDWT) and its inverse DWT (IDWT) hardware architecture filter generated similar results compared to the MATLAB model for the seven levels of DWT decomposition. Simulations were performed using grayscale images of different sizes to validate the proposed design and attain speed performance appropriate for a number of real-time applications.